Florida Polytechnic University, Florida, United States
Keywords: Tunnel Transistor, Transistor Gain, Subthreshold Swing, Quantum Computing, Dynamic PowerScaling of CMOS technology has enabled extraordinary improvements in the switching speed, density, functionality, and cost of micro- and nano-electronic applications. But due to the physical limitations of silicon, advanced CMOS technology now faces many challenges that result in high power consumption, increased leakage, and severe short channel effects. To keep the increasing power consumption and temperature in check there is a push to continuously reduce power supply level with technology scaling. However, further reduction of supply voltage is difficult due to the requirement to maintain higher switching speed. In deep-nanoscale arena this percentage will increase further. Conventional hardware-software coordination techniques would provide dynamic power reduction, but the static power due to subthreshold leakage cannot be minimized if we continue using the MOSFET technology. To overcome this fundamental material and technological barrier, the only path is to move the integrated circuit designs to post-MOSFET technology platform, where device gain would not depend on the above-mentioned thermionic limit. The goal of this proposal is to investigate and resolve the key fundamental issues and find innovative design solutions of tunneling field effect transistor based on 2D multilayer molybdenum disulfide or the next generation quantum computing for logic and ultra –low-power applications.