S-H. Song, S.Kim, S-S. Lee, and C.H. Kim
ANAFLASH Inc, United States
Keywords: Neural network accelerator, logic compatible embedded flash, non-volatile memory, edge, artificial intelligencePower efficient edge computing with some degree of Artificial Intelligence (AI) is a massive trend. The society is moving to include AI feature virtually in every edge device such as intelligent home product, smart mobile, security monitor, wireless sensor, self-driving car to name a few. A cost-effective deep neural network (DNN) accelerator IP is a key building block for such edge devices. Existing solution for the DNN HW typically requires off-chip access to retrieve neural network parameters from external memories, incurring additional communication latency and power consumption. Additionally, when critical neural network parameters are transmitted off-chip, security or privacy concern may arise. Alternative approach integrating the DNN engine in a special Non-Volatile Memory (NVM) process is not cost-effective for medium density DNN engine in cost-sensitive edge devices. To solve the security, latency, power consumption, and cost issues associated with the traditional approaches, we are developing a non-volatile neural network IP based on single-poly NVM using standard CMOS process. In this presentation, we discuss about the latest test chip result of our proprietary logic-compatible embedded flash based neuromorphic core. Carefully designed multi-level-cell program scheme has been employed to program the cell state precisely without using sophisticated voltage regulator circuits.